Nishank Pathak
11Patents
1h-index
12Co-inventors
40Inventor score
Filing activity: Nov 14, 2019 → Oct 26, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US11010862B1 | Reduced bandwidth tessellation factors | Physics | 4 | Active |
| US11508124B2 | Throttling hull shaders based on tessellation factors in a graphics pipeline | Physics | 1 | Active |
| US12236529B2 | Graphics discard engine | Physics | 0 | Active |
| US11710207B2 | Wave throttling based on a parameter buffer | Physics | 0 | Active |
| US11755336B2 | Distributed geometry | Physics | 0 | Active |
| US12169896B2 | Graphics primitives and positions through memory buffers | Physics | 0 | Active |
| US11532066B2 | Reduced bandwidth tessellation factors | Physics | 0 | Active |
| US11776085B2 | Throttling shaders based on resource usage in a graphics pipeline | Physics | 0 | Active |
| US11210757B2 | GPU packet aggregation system | Electricity | 0 | Active |
| US12062126B2 | Load multiple primitives per thread in a graphics pipeline | Physics | 0 | Active |
| US11948251B2 | Throttling hull shaders based on tessellation factors in a graphics pipeline | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.