Pattabhiraman K
42Patents
4h-index
78Co-inventors
62Inventor score
Filing activity: Oct 3, 2013 → Feb 5, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US11620256B2 | Systems and methods for improving cache efficiency and utilization | Physics | 32 | Active |
| US10380039B2 | Apparatus and method for memory management in a graphics processing environment | Physics | 17 | Active |
| US10401954B2 | Sensory enhanced augmented reality and virtual reality device | Physics | 10 | Active |
| US10983594B2 | Sensory enhanced augmented reality and virtual reality device | Physics | 5 | Active |
| US12079155B2 | Graphics processor operation scheduling for deterministic latency | Physics | 4 | Active |
| US10565354B2 | Apparatus and method for protecting content in virtualized and graphics environments | Electricity | 3 | Active |
| US10891773B2 | Apparatus and method for efficient graphics virtualization | Emerging Cross-Sectional Technologies | 3 | Active |
| US10970538B2 | Dynamic brightness and resolution control in virtual environments | Physics | 2 | Active |
| US11829525B2 | Sensory enhanced augmented reality and virtual reality device | Physics | 2 | Active |
| US10152632B2 | Dynamic brightness and resolution control in virtual environments | Physics | 2 | Active |
| US10304421B2 | Apparatus and method for remote display and content protection in a virtualized graphics processing environment | Physics | 1 | Active |
| US10783084B2 | Sector cache for compression | Emerging Cross-Sectional Technologies | 1 | Active |
| US10769078B2 | Apparatus and method for memory management in a graphics processing environment | Physics | 1 | Active |
| US11360914B2 | Apparatus and method for memory management in a graphics processing environment | Physics | 1 | Active |
| US10387992B2 | Apparatus and method for dynamic provisioning, quality of service, and prioritization in a graphics processor | Physics | 1 | Active |
| US11263141B2 | Sector cache for compression | Emerging Cross-Sectional Technologies | 1 | Active |
| US12056059B2 | Systems and methods for cache optimization | Physics | 0 | Active |
| US12124383B2 | Systems and methods for cache optimization | Physics | 0 | Active |
| US11281837B2 | Router-based transaction routing for toggle reduction | Emerging Cross-Sectional Technologies | 0 | Active |
| US12386779B2 | Dynamic memory reconfiguration | Physics | 0 | Active |
| US11593269B2 | Sector cache for compression | Emerging Cross-Sectional Technologies | 0 | Active |
| US11341212B2 | Apparatus and method for protecting content in virtualized and graphics environments | Electricity | 0 | Active |
| US11288191B1 | Range based flushing mechanism | Emerging Cross-Sectional Technologies | 0 | Active |
| US11080213B2 | Apparatus and method for dynamic provisioning, quality of service, and scheduling in a graphics processor | Physics | 0 | Active |
| US10503652B2 | Sector cache for compression | Emerging Cross-Sectional Technologies | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.