Prakash Dev
6Patents
5h-index
23Co-inventors
52Inventor score
Filing activity: Jun 29, 2001 → Apr 3, 2003
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6649531B2 | Process for forming a damascene structure | Electricity | 60 | Expired |
| US6570256B2 | Carbon-graded layer for improved adhesion of low-k dielectrics to silicon substrates | Electricity | 48 | Expired |
| US6740539B2 | Carbon-graded layer for improved adhesion of low-k dielectrics to silicon substrates | Electricity | 22 | Expired |
| US6541810B2 | Modified vertical MOSFET and methods of formation thereof | Electricity | 15 | Expired |
| US6960523B2 | Method of reducing erosion of a nitride gate cap layer during reactive ion etch of nitride liner layer for bit line contact of DRAM device | Electricity | 7 | Expired |
| US6620699B2 | Method for forming inside nitride spacer for deep trench device DRAM cell | Electricity | 3 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.