Process for forming a damascene structure
US6649531B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 26, 2001 |
| Grant date | Nov 18, 2003 |
| Priority date | — |
| Expiry date | Dec 17, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02274
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for forming a damascene structure includes depositing a bilayer comprising a first dielectric layer and a second dielectric layer onto a substrate, wherein the first layer has a dielectric constant higher than the second layer, and wherein the second layer is selected from a low k dielectric material comprising Si, C, O and H. The multi-step damascene structure is patterned into the dielectric bilayer using highly selective anisotropic reactive ion etching. Photoresist, polymers and post etch residues are removed from the substrate using a plasma ashing process without damaging the underlying dielectric layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.