Prashant Sethi
75Patents
13h-index
111Co-inventors
87Inventor score
Filing activity: Feb 9, 1999 → May 2, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6907510B2 | Mapping of interconnect configuration space | Physics | 58 | Expired |
| US7231486B2 | General input/output architecture, protocol and related methods to support legacy interrupts | Electricity | 53 | Expired |
| US7949794B2 | PCI express enhancements and extensions | Emerging Cross-Sectional Technologies | 37 | Active |
| US7036122B2 | Device virtualization and assignment of interconnect devices | Physics | 29 | Expired |
| US6545684B1 | Accessing data stored in a memory | Physics | 26 | Expired |
| US6724390B1 | Allocating memory | Physics | 24 | Expired |
| US8464035B2 | Instruction for enabling a processor wait state | Emerging Cross-Sectional Technologies | 18 | Active |
| US8230120B2 | PCI express enhancements and extensions | Emerging Cross-Sectional Technologies | 17 | Active |
| US8719547B2 | Providing hardware support for shared virtual memory between local and remote physical memory | Physics | 16 | Active |
| US7810083B2 | Mechanism to emulate user-level multithreading on an OS-sequestered sequencer | Physics | 15 | Active |
| US7899943B2 | PCI express enhancements and extensions | Emerging Cross-Sectional Technologies | 15 | Active |
| US8099523B2 | PCI express enhancements and extensions including transactions having prefetch parameters | Emerging Cross-Sectional Technologies | 15 | Active |
| US6600493B1 | Allocating memory based on memory device organization | Physics | 14 | Expired |
| US8010969B2 | Mechanism for monitoring instruction set based thread execution on a plurality of instruction sequencers | Physics | 13 | Active |
| US6370633B2 | Converting non-contiguous memory into contiguous memory for a graphics processor | Physics | 13 | Expired |
| US7743233B2 | Sequencer address management | Physics | 13 | Active |
| US8230119B2 | PCI express enhancements and extensions | Emerging Cross-Sectional Technologies | 13 | Active |
| US8073981B2 | PCI express enhancements and extensions | Emerging Cross-Sectional Technologies | 12 | Active |
| US7930566B2 | PCI express enhancements and extensions | Emerging Cross-Sectional Technologies | 12 | Active |
| US8447888B2 | PCI express enhancements and extensions | Emerging Cross-Sectional Technologies | 9 | Active |
| US7065597B2 | Method and apparatus for in-band signaling of runtime general purpose events | Physics | 9 | Expired |
| US9990206B2 | Mechanism for instruction set based thread execution of a plurality of instruction sequencers | Physics | 9 | Active |
| US8549183B2 | PCI express enhancements and extensions | Emerging Cross-Sectional Technologies | 9 | Active |
| US8555101B2 | PCI express enhancements and extensions | Emerging Cross-Sectional Technologies | 8 | Active |
| US8667249B2 | Systems and methods exchanging data between processors through concurrent shared memory | Physics | 8 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.