Robert Boone
7Patents
3h-index
22Co-inventors
53Inventor score
Filing activity: Jul 17, 2001 → Jun 28, 2012
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8175737B2 | Method and apparatus for designing and integrated circuit | Physics | 57 | Active |
| US6593226B2 | Method for adding features to a design layout and process for designing a mask | Emerging Cross-Sectional Technologies | 18 | Expired |
| US7284231B2 | Layout modification using multilayer-based constraints | Physics | 12 | Expired |
| US7962868B2 | Method for forming a semiconductor device using optical proximity correction for the optical lithography | Physics | 3 | Active |
| US8370773B2 | Method and apparatus for designing an integrated circuit using inverse lithography technology | Physics | 3 | Active |
| US8661393B2 | Method for analyzing placement context sensitivity of standard cells | Physics | 2 | Active |
| US6818362B1 | Photolithography reticle design | Physics | 1 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.