Ross Dermott
14Patents
7h-index
9Co-inventors
55Inventor score
Filing activity: Mar 23, 2001 → Jul 18, 2011
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6728163B2 | Controlling a delay lock loop circuit | Electricity | 113 | Expired |
| US6556489B2 | Method and apparatus for determining digital delay line entry point | Physics | 57 | Expired |
| US6781861B2 | Method and apparatus for determining digital delay line entry point | Physics | 45 | Expired |
| US6586979B2 | Method for noise and power reduction for digital delay lines | Electricity | 32 | Expired |
| US7106646B2 | Circuit and method for controlling a clock synchronizing circuit for low power refresh operation | Physics | 26 | Expired |
| US6737897B2 | Power reduction for delay locked loop circuits | Electricity | 19 | Expired |
| US7276947B2 | Delay circuit with reset-based forward path static delay | Electricity | 7 | Active |
| US7683305B2 | Method and apparatus for ambient light detection | Physics | 5 | Active |
| US7076012B2 | Measure-controlled delay circuit with reduced playback error | Physics | 5 | Expired |
| US6975556B2 | Circuit and method for controlling a clock synchronizing circuit for low power refresh operation | Physics | 2 | Expired |
| US7126393B2 | Delay circuit with reset-based forward path static delay | Electricity | 1 | Expired |
| US7983110B2 | Circuit and method for controlling a clock synchronizing circuit for low power refresh operation | Physics | 1 | Active |
| US7606101B2 | Circuit and method for controlling a clock synchronizing circuit for low power refresh operation | Physics | 0 | Active |
| US8400868B2 | Circuit and method for controlling a clock synchronizing circuit for low power refresh operation | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.