Sunil Atri
12Patents
4h-index
11Co-inventors
53Inventor score
Filing activity: Sep 25, 2003 → May 18, 2018
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7675776B2 | Bit map control of erase block defect list in a memory | Physics | 11 | Active |
| US7424643B2 | Device, system and method for power loss recovery procedure for solid state non-volatile memory | Physics | 5 | Active |
| US7181672B2 | Method, system, and apparatus for supporting power loss recovery in ECC enabled memory devices | Physics | 5 | Expired |
| US7949851B2 | Translation management of logical block addresses and physical block addresses | Physics | 4 | Active |
| US8032787B2 | Volatile storage based power loss recovery mechanism | Physics | 3 | Active |
| US8464021B2 | Address caching stored translation | Physics | 3 | Active |
| US7953919B2 | Physical block addressing of electronic memory devices | Physics | 2 | Active |
| US9430314B2 | Memory program upon system failure | Physics | 2 | Active |
| US8239875B2 | Command queuing for next operations of memory devices | Physics | 2 | Active |
| US9990278B2 | Overlaid erase block mapping | Physics | 1 | Active |
| US8788740B2 | Data commit on multicycle pass complete without error | Physics | 0 | Active |
| US10949340B2 | Block mapping systems and methods for storage device | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.