William Loftin
6Patents
2h-index
8Co-inventors
36Inventor score
Filing activity: Oct 8, 2002 → Jan 18, 2008
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7262109B2 | Integrated circuit having a transistor level top side wafer contact and a method of manufacture therefor | Electricity | 8 | Expired |
| US7345343B2 | Integrated circuit having a top side wafer contact and a method of manufacture therefor | Electricity | 2 | Expired |
| US6856000B2 | Reduce 1/f noise in NPN transistors without degrading the properties of PNP transistors in integrated circuit technologies | Electricity | 2 | Expired |
| US6894318B2 | Diode having a double implanted guard ring | Emerging Cross-Sectional Technologies | 1 | Expired |
| US7195984B2 | Reduce 1/f noise in NPN transistors without degrading the properties of PNP transistors in integrated circuit technologies | Electricity | 0 | Expired |
| US7741205B2 | Integrated circuit having a top side wafer contact and a method of manufacture therefor | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.