Inventor · Campbell, CA, US

Yi-Ann Chen

11Patents

11h-index

8Co-inventors

54Inventor score

Filing activity: Dec 15, 2017 → Mar 6, 2020

Most-cited inventions

Patent	Title	Area	Cited by	Status
US10304881B1	CMOS image sensor with buried superlattice layer to reduce crosstalk	Electricity	48	Active
US10367028B2	CMOS image sensor including stacked semiconductor chips and image processing circuitry including a superlattice	Electricity	43	Active
US10608043B2	Method for making CMOS image sensor including stacked semiconductor chips and readout circuitry including a superlattice	Electricity	41	Active
US10529768B2	Method for making CMOS image sensor including pixels with read circuitry having a superlattice	Electricity	40	Active
US10461118B2	Method for making CMOS image sensor including photodiodes with overlying superlattices to reduce crosstalk	Electricity	40	Active
US10529757B2	CMOS image sensor including pixels with read circuitry having a superlattice	Electricity	40	Active
US10608027B2	Method for making CMOS image sensor including stacked semiconductor chips and image processing circuitry including a superlattice	Electricity	40	Active
US10396223B2	Method for making CMOS image sensor with buried superlattice layer to reduce crosstalk	Electricity	40	Active
US10355151B2	CMOS image sensor including photodiodes with overlying superlattices to reduce crosstalk	Electricity	40	Active
US10615209B2	CMOS image sensor including stacked semiconductor chips and readout circuitry including a superlattice	Electricity	40	Active
US11075078B1	Method for making a semiconductor device including a superlattice within a recessed etch	Electricity	17	Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.