Patent · US Active

In-memory multiply and accumulate with global charge-sharing

US10748603B2 · kind B2 · utility

7Cited by
1References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 28, 2018
Grant dateAug 18, 2020
Priority date
Expiry dateOct 30, 2038

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C2207/005
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A memory circuit has compute-in-memory circuitry that enables a multiply-accumulate (MAC) operation based on shared charge. Row access circuitry drives multiple rows of a memory array to multiply a first data word with a second data word stored in the memory array. The row access circuitry drives the multiple rows based on the bit pattern of the first data word. Column access circuitry drives a column of the memory array when the rows are driven. Accessed rows discharge the column line in an accumulative fashion. Sensing circuitry can sense voltage on the column line. A processor in the memory circuit computes a MAC value based on the voltage sensed on the column.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.