Process of forming an electronic device including an access region
US10797153B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 2, 2018 |
| Grant date | Oct 6, 2020 |
| Priority date | — |
| Expiry date | Jul 2, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/256
Abstract
A process of forming an electronic device can include forming a channel layer overlying a substrate and forming a barrier layer overlying the channel layer. In an embodiment, the process can further include forming a p-type semiconductor layer over the barrier layer, patterning the p-type semiconductor layer to define at least part of a gate electrode of a transistor structure, and forming an access region layer over the barrier layer. In another embodiment, the process can further include forming an etch-stop layer over the barrier layer, forming a sacrificial layer over the etch-stop layer, patterning the etch-stop and sacrificial layers to define a gate region, forming an access region layer over the barrier layer after patterning the etch-stop and sacrificial layers, and forming a p-type semiconductor layer within the gate region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.