Full-rail digital read compute-in-memory circuit

US10825509B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Huseyin Ekin Sumbul · Portland, US
• Gregory K. Chen · Ann Arbor, US
• Raghavan Kumar · Hillsboro, US
• Phil Knag · Portland, US
• Abhishek A. Sharma · Hillsboro, US
• Sasikanth Manipatruni · Ithaca, US
• Amrita Mathuriya · Portland, US
• Ram Krishnamurthy · Portland, US
• Ian A. Young · Portland, US

Key dates

• Filing date: Sep 28, 2018
• Grant date: Nov 3, 2020
• Expiry date: Oct 31, 2038

Classification

• Technology area (CPC G): Physics
• CPC primary: G11C11/418
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A full-rail digital-read CIM circuit enables a weighted read operation on a single row of a memory array. A weighted read operation captures a value of a weight stored in the single memory array row without having to rely on weighted row-access. Rather, using full-rail access and a weighted sampling capacitance network, the CIM circuit enables the weighted read operation even under process variation, noise and mismatch.