Memory device having programmable impedance elements with a common conductor formed below bit lines
US11056646B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 20, 2016 |
| Grant date | Jul 6, 2021 |
| Priority date | — |
| Expiry date | Jul 20, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/79
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit device can include a plurality of access transistors formed in a substrate having control terminals connected to word lines that extend in a first direction; a plurality of two-terminal programmable impedance elements formed over the substrate; at least one conductive plate structure formed on and having a common conductive connection to, the programmable impedance elements, and extending in at least the first direction; a plurality of storage contacts that extend from a first current terminal of each access transistor to one of the programmable impedance elements; a plurality of bit lines formed over the at least one conductive plate structure, the bit lines extending in a second direction different from the first direction; and a plurality of bit line contacts that extend from a second current terminal of each access transistor through openings in the at least one plate structure to one of the bit lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.