CVD of silicon oxide using TEOS decomposition and in-situ planarization process

US4872947A · kind A · utility

Assignee

• Applied Materials, Inc. · US

Inventors

• David N. Wang · Saratoga, US
• John M. White · Hayward, US
• Kam S. Law · San Jose, US
• Cissy Leung · Fremont, US
• Salvador P. Umotoy · Pittsburg, US
• Kenneth S. Collins · San Jose, US
• John A. Adamik · San Ramon, US
• Ilya Perlov · Santa Clara, US
• Dan Maydan · Los Altos Hills, US

Key dates

• Filing date: Oct 26, 1988
• Grant date: Oct 10, 1989
• Expiry date: Oct 26, 2008

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/02274
• WIPO field: Surface technology, coating
• WIPO sector: Chemistry

Abstract

A high pressure, high throughput, single wafer, semiconductor processing reactor is disclosed which is capable of thermal CVD, plasma-enhanced CVD, plasma-assisted etchback, plasma self-cleaning, and deposition topography modification by sputtering, either separately or as part of in-situ multiple step processing. A low temperature CVD process for forming a highly conformal layer of silicon dioxide is also disclosed. The process uses very high chamber pressure and low temperature, and TEOS and ozone reactants. The low temperature CVD silicon dioxide deposition step is particularly useful for planarizing underlying stepped dielectric layers, either along or in conjunction with a subsequent isotropic etch. A preferred in-situ multiple-step process for forming a planarized silicon dioxide layer uses (1) high rate silicon dioxide deposition at a low temperature and high pressure followed by (2) the deposition of the conformal silicon dioxide layer also at high pressure and low temperature, followed by (3) a high rate isotropic etch, preferably at low temperature and high pressure in the same reactor used for the two oxide deposition steps. Various combinations of the steps are disclose…