Method for manufacturing a semiconductor device and a semiconductor memory device
US5346834A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 3, 1992 |
| Grant date | Sep 13, 1994 |
| Priority date | — |
| Expiry date | Mar 3, 2012 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/014
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An improved method for manufacturing an insulated gate field effect transistor is provided. As a first step, a silicon oxide film is grown on a silicon substrate, and a first silicon nitride film is deposited thereon. The first silicon nitrite film, the silicon oxide film and the silicon substrate are then etched using a resist pattern as a mask to form a silicon island which includes at least a part of the silicon substrate. A second silicon oxide film is then grown on the surface of the silicon substrate exposed by the second step, as well as on the surface of the silicon island, and a second silicon nitrite film is deposited thereon. The second silicon nitrite film is then etched to leave a portion of the second silicon nitrite film deposited on a side wall of the silicon island. After this, a third silicon oxide film is grown by thermal oxidation of the surface of the silicon substrate to electrically separate the silicon island from the silicon substrate. Next a gate electrode is formed on silicon island, followed by forming source and drain regions in the silicon island employing the gate electrode as a mask.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.