Method of manufacturing a semiconductor device having silicon islands
US5466621A · kind A · utility
101Cited by
7References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 25, 1993 |
| Grant date | Nov 14, 1995 |
| Priority date | — |
| Expiry date | Oct 25, 2013 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/014
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device such as FET or charge coupled device, having a channel or a charge coupled portion provided in a thin semiconductor layer which is nearly perpendicular to the substrate and to which the necessary electrode such as the gate electrode and the necessary insulating layer are added can maintain the necessary amount of electric current by securing the height of the semiconductor layer and also can have its plane size reduced minutely. Further, the semiconductor memory device using the above semiconductor device is suitable to high integration and has excellent electric characteristics.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.