Method for testing semiconductor components
US6396291B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 28, 2000 |
| Grant date | May 28, 2002 |
| Priority date | — |
| Expiry date | Nov 28, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R1/0483
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A system and method for testing semiconductor components are provided. The system includes: a test board, sockets mounted to the test board in electrical communication with test circuitry, and carriers mounted to the sockets for housing the components. The carriers include bases, and interconnects mounted thereon, having contact members configured to make temporary electrical connections with contacts on the components. In addition, the contact members on the interconnects can be shaped to perform an alignment function, and to prevent excessive deformation of the contacts on the components. The sockets include camming members and electrical connectors configured to electrically contact the carriers with a zero insertion force. During a test procedure, the bases and interconnects can remain mounted to the sockets on the test board, as the components are aligned and placed in electrical contact with the interconnects. However, different bases and interconnects can be mounted to the sockets for testing different types of components.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.