Derek Gochnour
89Patents
27h-index
18Co-inventors
85Inventor score
Filing activity: May 26, 1992 → Jun 27, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6578458B1 | Method for sawing wafers employing multiple indexing techniques for multiple die dimensions | Emerging Cross-Sectional Technologies | 290 | Expired |
| US6025728A | Semiconductor package with wire bond protective member | Electricity | 144 | Expired |
| US5962921A | Interconnect having recessed contact members with penetrating blades for testing semiconductor dice and packages with contact bumps | Electricity | 124 | Expired |
| US6040702A | Carrier and system for testing bumped semiconductor components | Electricity | 115 | Expired |
| US5893726A | Semiconductor package with pre-fabricated cover and method of fabrication | Electricity | 110 | Expired |
| US6263566A | Flexible semiconductor interconnect fabricated by backslide thinning | Emerging Cross-Sectional Technologies | 107 | Expired |
| US5678301A | Method for forming an interconnect for testing unpackaged semiconductor dice | Emerging Cross-Sectional Technologies | 85 | Expired |
| US6247629A | Wire bond monitoring system for layered packages | Electricity | 83 | Expired |
| US6208157A | Method for testing semiconductor components | Physics | 79 | Expired |
| US6072326A | System for testing semiconductor components | Physics | 78 | Expired |
| US6300782A | System for testing semiconductor components having flexible interconnect | Emerging Cross-Sectional Technologies | 75 | Expired |
| US6057597A | Semiconductor package with pre-fabricated cover | Electricity | 61 | Expired |
| US6242931A | Flexible semiconductor interconnect fabricated by backside thinning | Emerging Cross-Sectional Technologies | 60 | Expired |
| US5907492A | Method for using data regarding manufacturing procedures integrated circuits (IC's) have undergone, such as repairs, to select procedures the IC's will undergo, such as additional repairs | Electricity | 60 | Expired |
| US6232243A | Interconnect having recessed contact members with penetrating blades for testing semiconductor dice and packages with contact bumps | Electricity | 58 | Expired |
| US6313651A | Carrier and system for testing bumped semiconductor components | Electricity | 53 | Expired |
| US6025731A | Hybrid interconnect and system for testing semiconductor dice | Physics | 49 | Expired |
| US6363295B1 | Method for using data regarding manufacturing procedures integrated circuits (IC's) have undergone, such as repairs, to select procedures the IC's will undergo, such as additional repairs | Electricity | 42 | Expired |
| US5173451A | Soft bond for semiconductor dies | Electricity | 42 | Expired |
| US6553276B2 | Method of using data regarding manufacturing procedures integrated circuits (IC's) have undergone, such as repairs, to select procedures the IC's will undergo, such as additional repairs | Electricity | 37 | Expired |
| US6369595B1 | CSP BGA test socket with insert and method | Electricity | 34 | Expired |
| US6970359B2 | Reduced-sized memory card package, length-extending adaptor and method of forming adaptor | Electricity | 33 | Expired |
| US5915755A | Method for forming an interconnect for testing unpackaged semiconductor dice | Emerging Cross-Sectional Technologies | 33 | Expired |
| US6006739A | Method for sawing wafers employing multiple indexing techniques for multiple die dimensions | Emerging Cross-Sectional Technologies | 33 | Expired |
| US5336649A | Removable adhesives for attachment of semiconductor dies | Electricity | 32 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.