Use of high-K dielectric material in modified ONO structure for semiconductor devices
US6642573B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 13, 2002 |
| Grant date | Nov 4, 2003 |
| Priority date | — |
| Expiry date | Mar 13, 2022 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/954
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for fabrication of a semiconductor device including a modified ONO structure, comprising forming the modified ONO structure by providing a semiconductor substrate; forming a first dielectric material layer on the semiconductor substrate; depositing a silicon nitride layer on the first dielectric material layer; and forming a top dielectric material layer, wherein at least one of the bottom dielectric material layer and the top dielectric material layer comprise a mid-K or a high-K dielectric material. The semiconductor device may be, e.g., a SONOS two-bit EEPROM device or a floating gate flash device including the modified ONO structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.