Methods and apparatus for forming barrier layers in high aspect ratio vias

US6784096B2 · kind B2 · utility

Assignee

• Applied Materials, Inc. · US

Inventors

• Fusen Chen · Dallas, US
• Ling Chen · Sunnyvale, US
• Walter Glenn · Pacifica, US
• Praburam Gopalraja · San Jose, US
• Jianming Fu · San Jose, US

Key dates

• Filing date: Sep 11, 2002
• Grant date: Aug 31, 2004
• Expiry date: Sep 11, 2022

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/76873
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

In a first aspect, a method is provided that includes (1) forming a first barrier layer over the sidewalls and bottom of a via using atomic layer deposition within an atomic layer deposition (ALD) chamber; (2) removing at least a portion of the first barrier layer from the bottom of the via by sputter etching; and (3) depositing a second barrier layer on the sidewalls and bottom of the via within the ALD chamber. Numerous other embodiments are provided, as are systems, methods and computer program products in accordance with these and other aspects.