Vertical thermal nitride mask (anti-collar) and processing thereof
US6797582B2 · kind B2 · utility
1Cited by
17References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 30, 2003 |
| Grant date | Sep 28, 2004 |
| Priority date | — |
| Expiry date | Apr 30, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/0387
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A 3D microelectronic structure is provided which includes a substrate having at least one opening present therein, the at least one opening having sidewalls which extend to a common bottom wall; and a thermal nitride layer present on at least an upper portion of each sidewall of openings. A method for fabricating the above-mentioned 3D microelectronic structure is also provided. Specifically, the method includes a step of selectively forming a thermal nitride layer on at least an upper portion of each sidewall of an opening formed in a substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.