Barrier layer and a method for suppressing diffusion processes during the production of semiconductor devices

US7157371B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Thomas Hecht · Dresden, DE
• Uwe Schroeder · Fishkill, US
• Harald Seidl · Brandenburg an der Havel, DE
• Martin Gutsche · Dorfen, DE
• Stefan Jakschik · Kessel-Lo, BE
• Stephan Kudelka · Radeberg, DE
• Albert Birner · Regensburg, DE

Key dates

• Filing date: Sep 2, 2003
• Grant date: Jan 2, 2007
• Expiry date: Dec 5, 2023

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/02178
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A dielectric barrier layer composed of a metal oxide is applied in thin layers with a thickness of less than 20 nanometers in the course of processing semiconductor devices by sequential gas phase deposition or molecular beam epitaxy in molecular individual layers on differently structured base substrates. The method allows, inter alias, effective conductive diffusion barriers to be formed from a dielectric material, an optimization of the layer thickness of the barrier layer, an increase in the temperature budget for subsequent process steps, and a reduction in the effort for removing the temporary barrier layers.