Computer system architecture for a processor connected to a high speed bus transceiver
US7234017B2 · kind B2 · utility
7Cited by
28References
32Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 24, 2005 |
| Grant date | Jun 19, 2007 |
| Priority date | — |
| Expiry date | Jul 6, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4059
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A high speed computer processor system has a high speed interface for a graphics processor. A preferred embodiment combines a PowerPC microprocessor called the Giga-Processor Ultralite (GPUL) 110 from International Business Machines Corporation (IBM) with a high speed interface on a multi-chip module.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.