Stacked die-in-die BGA package with die having a recess
US7282390B2 · kind B2 · utility
12Cited by
52References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 25, 2006 |
| Grant date | Oct 16, 2007 |
| Priority date | — |
| Expiry date | May 25, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Semiconductor devices and stacked die assemblies, and methods of fabricating the devices and assemblies are provided. In an embodiment of the methods, a second die is mounted on a first die which is at least partially received within a recess of the second die and an overall height of the dies within the device is less than a combined height of the dies.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.