Trench FET with improved body to gate alignment
US7416948B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 23, 2006 |
| Grant date | Aug 26, 2008 |
| Priority date | — |
| Expiry date | Jan 13, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/516
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A field effect transistor is formed as follows. Trenches are formed in a semiconductor region of a first conductivity type. Each trench is partially filled with one or more materials. A dual-pass angled implant is carried out to implant dopants of a second conductivity type into the semiconductor region through an upper surface of the semiconductor region and through upper trench sidewalls not covered by the one or more material. A high temperature process is carried out to drive the implanted dopants deeper into the mesa region thereby forming body regions of the second conductivity type between adjacent trenches. Source regions of the first conductivity type are then formed in each body region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.