Spacer-less low-k dielectric processes

US7615427B2 · kind B2 · utility

Assignee

• Chartered Semiconductor Manufacturing LTD · SG

Inventors

• Yong Meng Lee · Singapore, SG
• Young Way Teh · Singapore, SG
• Chung Woh Lai · Singapore, SG
• Wenhe Lin · Saratoga Springs, US
• Khee Yong Lim · Singapore, SG
• Wee Leng Tan · Singapore, SG
• Hui Peng Koh · Singapore, SG
• John Sudijono · Singapore, SG
• Liang-Choo Hsia · Singapore, SG

Key dates

• Filing date: Jun 5, 2006
• Grant date: Nov 10, 2009
• Expiry date: Nov 9, 2027

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/601

Abstract

A first example embodiment provides a method of removing first spacers from gates and incorporating a low-k material into the ILD layer to increase device performance. A second example embodiment comprises replacing the first spacers after silicidation with low-k spacers. This serves to reduce the parasitic capacitances. Also, by implementing the low-k spacers only after silicidation, the embodiments' low-k spacers are not compromised by multiple high dose ion implantations and resist strip steps. The example embodiments can improve device performance, such as the performance of a rim oscillator.