Air gap under on-chip passive device

US7662722B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Anthony K. Stamper · Williston, US
• Anil K. Chinthakindi · Fishkill, US
• Douglas D. Coolbaugh · Highland, US
• Timothy J. Dalton · Ridgefield, US
• Daniel C. Edelstein · White Plains, US
• Ebenezer E. Eshun · South Burlington, US
• Jeffrey P. Gambino · Gresham, US
• William J. Murphy · North Ferrisburgh, US
• Kunal Vaed · Poughkeepsie, US

Key dates

• Filing date: Jan 24, 2007
• Grant date: Feb 16, 2010
• Expiry date: Nov 30, 2027

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/0002
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A method is provided for fabricating a microelectronic chip which includes a passive device such, as an inductor, overlying an air gap. In such method, a plurality of front-end-of-line (“FEOL”) devices are formed in a semiconductor region of the microelectronic chip, and a plurality of stacked interlevel dielectric (“ILD”) layers are formed to overlie the plurality of FEOL devices, the plurality of stacked ILD layers including a first ILD layer and a second ILD layer, where the second ILD layer is resistant to attack by a first etchant which attacks the first ILD layer. A passive device is formed to overlie at least the first ILD layer. Using the first etchant, a portion of the first ILD layer in registration with the passive device is removed to form an air gap which underlies the passive device in registration with the passive device.