Method of forming gate stack and structure thereof

US7691701B1 · kind B1 · utility

Assignees

• International Business Machines Corporation · US
• Freeescale Semiconductor, Inc. · US

Inventors

• Michael P. Belyansky · Hopewell Junction, US
• Siddarth A. Krishnan · Newark, US
• Unoh Kwon · Fishkill, US
• Naim Moumen · Walden, US
• Ravikumar Ramachandran · Beacon, US
• James K. Schaeffer · Austin, US
• Richard S. Wise · Beacon, US
• Keith Kwong Hon Wong · Wappingers Falls, US
• Hongwen Yan · Somers, US

Key dates

• Filing date: Jan 5, 2009
• Grant date: Apr 6, 2010
• Expiry date: Jan 5, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/0181

Abstract

Embodiments of the present invention provide a method of forming gate stacks for field-effect-transistors. The method includes forming a metal-containing layer directly on a first titanium-nitride (TiN) layer, the first TiN layer covering areas of a semiconductor substrate designated for first and second types of field-effect-transistors; forming a capping layer of a second TiN layer on top of the metal-containing layer; patterning the second TiN layer and the metal-containing layer to cover only a first portion of the first TiN layer, the first portion of the first TiN layer covering an area designated for the first type of field-effect-transistors; etching away a second portion of the first TiN layer exposed by the patterning while protecting the first portion of the first TiN layer, from the etching, through covering with at least a portion of thickness of the patterned metal-containing layer; and forming a third TiN layer covering an areas of the semiconductor substrate designated for the second type of field-effect-transistors.