Technique for locally adapting transistor characteristics by using advanced laser/flash anneal techniques
US7745334B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 18, 2007 |
| Grant date | Jun 29, 2010 |
| Priority date | — |
| Expiry date | Nov 9, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/015
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
By performing sophisticated anneal techniques, such as laser anneal, flash anneal and the like, for a metal silicide formation, such as nickel silicide, the risk of nickel silicide defects in sensitive device regions, such as SRAM pass gates, may be significantly reduced. Also, the activation of dopants may be performed in a highly localized manner, so that undue damage of gate insulation layers may be avoided when activating and re-crystallizing drain and source regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.