Overlay metrology and control method
US7804994B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 13, 2003 |
| Grant date | Sep 28, 2010 |
| Priority date | — |
| Expiry date | Aug 18, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F9/7011
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An overlay method for determining the overlay error of a device structure formed during semiconductor processing is disclosed. The overlay method includes producing calibration data that contains overlay information relating the overlay error of a first target at a first location to the overlay error of a second target at a second location for a given set of process conditions. The overlay method also includes producing production data that contains overlay information associated with a production target formed with the device structure. The overlay method further includes correcting the overlay error of the production target based on the calibration data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.