Minimizing degradation of SiC bipolar semiconductor devices
US7880171B2 · kind B2 · utility
0Cited by
15References
27Claims
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Key dates
| Filing date | Dec 22, 2004 |
| Grant date | Feb 1, 2011 |
| Priority date | — |
| Expiry date | Dec 22, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D18/60
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
A bipolar device has at least one p− type layer of single crystal silicon carbide and at least one n− type layer of single crystal silicon carbide, wherein those portions of those stacking faults that grow under forward operation are segregated from at least one of the interfaces between the active region and the remainder of the device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.