Polysilicon control etch-back indicator
US7928507B2 · kind B2 · utility
1Cited by
0References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 9, 2009 |
| Grant date | Apr 19, 2011 |
| Priority date | — |
| Expiry date | Dec 9, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/519
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
This invention discloses a semiconductor wafer for manufacturing electronic circuit thereon. The semiconductor substrate further includes an etch-back indicator that includes trenches of different sizes having polysilicon filled in the trenches and then completely removed from some of the trenches of greater planar trench dimensions and the polysilicon still remaining in a bottom portion in some of the trenches having smaller planar trench dimensions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.