Method of forming trench-gate field effect transistors
US8043913B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 29, 2011 |
| Grant date | Oct 25, 2011 |
| Priority date | — |
| Expiry date | Mar 29, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/516
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a field effect transistor includes: forming a trench in a semiconductor region; forming a shield electrode in the trench; performing an angled sidewall implant of impurities of the first conductivity type to form a channel enhancement region adjacent the trench; forming a body region of a second conductivity type in the semiconductor region; and forming a source region of the first conductivity type in the body region, the source region and an interface between the body region and the semiconductor region defining a channel region therebetween, the channel region extending along the trench sidewall. The channel enhancement region partially extends into a lower portion of the channel region to thereby reduce a resistance of the channel region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.