PFET with tailored dielectric and related methods and integrated circuit

US8053306B2 · kind B2 · utility

Assignees

• International Business Machines Corporation · US
• Advanced Micro Devices, Inc. · US

Inventors

• Rick Carter · Saratoga Springs, US
• Michael P. Chudzik · Beacon, US
• Rashmi Jha · Wyoming, US
• Naim Moumen · Walden, US

Key dates

• Filing date: Dec 13, 2007
• Grant date: Nov 8, 2011
• Expiry date: Apr 20, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/0179

Abstract

A PFET having tailored dielectric constituted in part by an NFET threshold voltage (Vt) work function tuning layer in a gate stack thereof, related methods and integrated circuit are disclosed. In one embodiment, the PFET includes an n-type doped silicon well (N-well), a gate stack including: a doped band engineered PFET threshold voltage (Vt) work function tuning layer over the N-well; a tailored dielectric layer over the doped band engineered PFET Vt work function tuning layer, the tailored dielectric layer constituted by a high dielectric constant layer over the doped band engineered PFET Vt work function tuning layer and an n-type field effect transistor (NFET) threshold voltage (Vt) work function tuning layer over the high dielectric constant layer; and a metal over the NFET Vt work function tuning layer.