Strained CMOS device, circuit and method of fabrication

US8169025B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Stephen W. Bedell · Wappingers Falls, US
• Kangguo Cheng · Schenectady, US
• Bruce B. Doris · Brewster, US
• Ali Khakifirooz · Los Altos, US
• Devendra K. Sadana · Pleasantville, US
• Ghavam G. Shahidi · Pound Ridge, US

Key dates

• Filing date: Jan 19, 2010
• Grant date: May 1, 2012
• Expiry date: Oct 30, 2030

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D86/215

Abstract

A semiconductor device and fabrication method include a strained semiconductor layer having a strain in one axis. A long fin and a short fin are formed in the semiconductor layer such that the long fin has a strained length along the one axis. An n-type transistor is formed on the long fin, and a p-type transistor is formed on the at least one short fin. The strain in the n-type transistor improves performance.