Patent · US Active

Circuit with transistors integrated in three dimensions and having a dynamically adjustable threshold voltage VT

US8183630B2 · kind B2 · utility

252Cited by
6References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 29, 2009
Grant dateMay 22, 2012
Priority date
Expiry dateMay 29, 2029

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D88/00

Abstract

A microelectronic device including: a substrate surmounted by a stack of layers, at least one first transistor situated at a given level of said stack, at least one second transistor situated at a second level of said stack, above said given level, the first transistor including a gate electrode situated opposite a channel zone of the second transistor, the first transistor and the second transistor being separated by an insulating zone, and said insulating zone being constituted of several different dielectric materials include a first dielectric material and a second dielectric material.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.