Spacer as hard mask scheme for in-situ doping in CMOS finFETs
US8420464B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | May 4, 2011 |
| Grant date | Apr 16, 2013 |
| Priority date | — |
| Expiry date | Aug 26, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/215
Abstract
A method of fabricating a semiconductor device that includes at least two fin structures, wherein one of the at least two fin structures include epitaxially formed in-situ doped second source and drain regions having a facetted exterior sidewall that are present on the sidewalls of the fin structure. In another embodiment, the disclosure also provides a method of fabricating a finFET that includes forming a recess in a sidewall of a fin structure, and epitaxially forming an extension dopant region in the recess that is formed in the fin structure. Structures formed by the aforementioned methods are also described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.