Methods of forming bulk FinFET semiconductor devices by performing a liner recessing process to define fin heights and FinFET devices with such a recessed liner

US8815742B2 · kind B2 · utility

Assignees

• GlobalFoundries Inc. · KY
• International Business Machines Corporation · US

Inventors

• Xiuyu Cai · San Diego, US
• Ruilong Xie · Niskayuna, US
• Kangguo Cheng · Schenectady, US
• Ali Khakifirooz · Los Altos, US

Key dates

• Filing date: Dec 12, 2012
• Grant date: Aug 26, 2014
• Expiry date: Jan 17, 2033

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/62

Abstract

One method disclosed herein includes forming a conformal liner layer in a plurality of trenches that define a fin, forming a layer of insulating material above the liner layer, exposing portions of the liner layer, removing portions of the liner layer so as to result in a generally U-shaped liner positioned at a bottom of each of the trenches, performing at least one third etching process on the layer of insulating material, wherein at least a portion of the layer of insulating material is positioned within a cavity of the U-shaped liner layer, and forming a gate structure around the fin. A FinFET device disclosed herein includes a plurality of trenches that define a fin, a local isolation that includes a generally U-shaped liner that defines, in part, a cavity and a layer of insulating material positioned within the cavity, and a gate structure positioned around the fin.