Patent · US Active

Methods of forming bulk FinFET devices by performing a recessing process on liner materials to define different fin heights and FinFET devices with such recessed liner materials

US8835262B2 · kind B2 · utility

21Cited by
4References
24Claims
0Family size

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Key dates

Filing dateJan 8, 2013
Grant dateSep 16, 2014
Priority date
Expiry dateMar 9, 2033

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D30/62

Abstract

One method includes performing an etching process through a patterned mask layer to form trenches in a substrate that defines first and second fins, forming liner material adjacent the first fin to a first thickness, forming liner material adjacent the second fin to a second thickness different from the first thickness, forming insulating material in the trenches adjacent the liner materials and above the mask layer, performing a process operation to remove portions of the layer of insulating material and to expose portions of the liner materials, performing another etching process to remove portions of the liner materials and the mask layer to expose the first fin to a first height and the second fin to a second height different from the first height, performing another etching process to define a reduced-thickness layer of insulating material, and forming a gate structure around a portion of the first and second fin.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.