Method of manufacturing semiconductor devices including replacement metal gate process incorporating a conductive dummy gate layer
US8835292B2 · kind B2 · utility
1Cited by
5References
19Claims
0Family size
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Key dates
| Filing date | Oct 31, 2012 |
| Grant date | Sep 16, 2014 |
| Priority date | — |
| Expiry date | Dec 28, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/28088
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a semiconductor device including a replacement metal gate process incorporating a conductive dummy gate layer (e.g., silicon germanium (SiGe), titanium nitride, etc.) and a related are disclosed. The method includes forming an oxide layer on a substrate; removing a gate portion of the oxide layer from the substrate in a first region of the semiconductor device; forming a conductive dummy gate layer on the semiconductor device in the first region; and forming a gate on the semiconductor device, the gate including a gate conductor disposed in the first region and directly connected to the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.