Min Dai
46Patents
6h-index
67Co-inventors
68Inventor score
Filing activity: Apr 29, 2008 → Jan 26, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9478173B2 | Adaptive color correction for display with backlight modulation | Physics | 9 | Active |
| US8660175B2 | Selective display of interpolated or extrapolated video units | Electricity | 8 | Active |
| US8836037B2 | Structure and method to form input/output devices | Electricity | 7 | Active |
| US8953685B2 | Resource-adaptive video interpolation or extrapolation with motion level analysis | Electricity | 6 | Active |
| US8575879B2 | Methods, systems and apparatus for controlling a multi-phase inverter | Electricity | 6 | Active |
| US8952460B2 | Germanium oxide free atomic layer deposition of silicon oxide and high-k gate dielectric on germanium containing channel for CMOS devices | Electricity | 6 | Active |
| US9484427B2 | Field effect transistors having multiple effective work functions | Electricity | 5 | Active |
| US8519648B2 | Temperature compensation for improved field weakening accuracy | Electricity | 5 | Active |
| US9426414B2 | Reference selection for video interpolation or extrapolation | Electricity | 4 | Active |
| US8809962B2 | Transistor with reduced parasitic capacitance | Electricity | 4 | Active |
| US9357233B2 | Video decoder error handling | Electricity | 3 | Active |
| US9029959B2 | Composite high-k gate dielectric stack for reducing gate leakage | Electricity | 3 | Active |
| US10482843B2 | Selective reduction of blue light in a display frame | Physics | 2 | Active |
| US9059315B2 | Concurrently forming nFET and pFET gate dielectric layers | Electricity | 2 | Active |
| US8735244B2 | Semiconductor device devoid of an interfacial layer and methods of manufacture | Electricity | 2 | Active |
| US9257519B2 | Semiconductor device including graded gate stack, related method and design structure | Electricity | 1 | Active |
| US9373501B2 | Hydroxyl group termination for nucleation of a dielectric metallic oxide | Chemistry; Metallurgy | 1 | Active |
| US9639920B2 | Dither directed LUT output value interpolation | Physics | 1 | Active |
| US8751192B2 | Methods and systems for assessing vehicle transmissions | Mechanical Engineering; Lighting; Heating | 1 | Active |
| US8835292B2 | Method of manufacturing semiconductor devices including replacement metal gate process incorporating a conductive dummy gate layer | Electricity | 1 | Active |
| US10631005B2 | System and method for coding in block prediction mode for display stream compression (DSC) | Electricity | 1 | Active |
| US8557668B2 | Method for forming N-shaped bottom stress liner | Electricity | 1 | Active |
| US8809152B2 | Germanium oxide free atomic layer deposition of silicon oxide and high-k gate dielectric on germanium containing channel for CMOS devices | Electricity | 1 | Active |
| US9099461B2 | Method of manufacturing scaled equivalent oxide thickness gate stacks in semiconductor devices and related design structure | Electricity | 1 | Active |
| US9673108B1 | Fabrication of higher-K dielectrics | Electricity | 1 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.