Power MOSFET device structure for high frequency applications
US8963233B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 30, 2012 |
| Grant date | Feb 24, 2015 |
| Priority date | — |
| Expiry date | Aug 12, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/393
Abstract
This invention discloses a new switching device that includes a drain disposed on a first surface and a source region disposed near a second surface of a semiconductor opposite the first surface. An insulated gate electrode is disposed on top of the second surface for controlling a source to drain current and a source electrode is interposed into the insulated gate electrode for substantially preventing a coupling of an electrical field between the gate electrode and an epitaxial region underneath the insulated gate electrode. The source electrode further covers and extends over the insulated gate for covering an area on the second surface of the semiconductor to contact the source region, An epitaxial layer is disposed above and having a different dopant concentration than the drain region. The gate electrode is insulated from the source electrode by an insulation layer having a thickness depending on a Vgsmax rating of the vertical power device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.