Methods of forming silicon nitride spacers
US9257293B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 12, 2014 |
| Grant date | Feb 9, 2016 |
| Priority date | — |
| Expiry date | Mar 12, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/3105
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments of methods of forming silicon nitride spacers are provided herein. In some embodiments, a method of forming silicon nitride spacers atop a substrate includes: depositing a silicon nitride layer atop an exposed silicon containing layer and an at least partially formed gate stack disposed atop a substrate; modifying a portion of the silicon nitride layer by exposing the silicon nitride layer to a hydrogen or helium containing plasma that is substantially free of fluorine; and removing the modified portion of the silicon nitride layer by performing a wet cleaning process to form the silicon nitride spacers, wherein the wet cleaning process removes the modified portion of the silicon nitride layer selectively to the silicon containing layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.