Epitaxially grown silicon germanium channel FinFET with silicon underlayer
US9287264B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 5, 2014 |
| Grant date | Mar 15, 2016 |
| Priority date | — |
| Expiry date | Dec 5, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/215
Abstract
Embodiments of the present invention provide a method for epitaxially growing a FinFET. One method may include providing a semiconductor substrate including an insulator and an underlayer; forming a channel layer on the semiconductor substrate using epitaxial growth; etching a recess into the channel layer and epitaxially regrowing a portion on the channel layer; etching the channel layer and the underlayer to form fins; forming a gate structure and a set of spacers; etching a source drain region into the channel layer; and forming a source drain material in the source drain region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.