Method to form dual channel semiconductor material fins

US9362179B1 · kind B1 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Kangguo Cheng · Schenectady, US
• Ryan O. Jung · Rensselaer, US
• Fee Li Lie · Albany, US
• Eric R. Miller · Schenectady, US
• John R. Sporre · Albany, US
• Sean Teehan · Rensselaer, US

Key dates

• Filing date: Jun 22, 2015
• Grant date: Jun 7, 2016
• Expiry date: Jun 22, 2035

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/017
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A silicon fin precursor is formed in an nFET device region and a fin stack comprising alternating material portions, and from bottom to top, of silicon and a silicon germanium alloy is formed in a pFET device region. A thermal anneal is then used to convert the fin stack into a silicon germanium alloy fin precursor. A thermal oxidation process follows that converts the silicon fin precursor into a silicon fin and the silicon germanium alloy fin precursor into a silicon germanium alloy fin. Functional gate structures can be formed straddling over each of the various fins.