Multi-layer spacer used in finFET

US9419101B1 · kind B1 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventors

• Jianwei Peng · Daguantang, CN
• Hong Yu · Rexford, US
• Zhao Lun · Singapore, SG
• Tao Han · Nanjing, CN
• Hsien-Ching Lo · Clifton Park, US
• Basab Banerjee · Ballston Lake, US
• Wen Zhi Gao · Singapore, SG
• Byoung-Gi Min · Cohoes, US

Key dates

• Filing date: Nov 4, 2015
• Grant date: Aug 16, 2016
• Expiry date: Nov 4, 2035

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/834

Abstract

A method of forming spacers and the resulting fin-shaped field effect transistors are provided. Embodiments include forming a silicon (Si) fin over a substrate; forming a polysilicon gate over the Si fin; and forming a spacer on top and side surfaces of the polysilicon gate, and on exposed upper and side surfaces of the Si fin, the spacer including: a first layer and second layer having a first dielectric constant, and a third layer formed between the first and second layers and having a second dielectric constant, wherein the second dielectric constant is lower than the first dielectric constant.