Three-dimensional memory device containing CMOS devices over memory stack structures

US9530790B1 · kind B1 · utility

Assignee

• Sandisk Technologies, Inc. · US

Inventors

• Zhenyu Lu · Hubei, CN
• Andrew Lin · San Jose, US
• Johann Alsmeier · San Jose, US
• Peter Rabkin · Cupertino, US
• Wei Zhao · Milpitas, US
• Wenguang Shi · Milpitas, US
• Henry Chien · San Jose, US
• Jian Chen · San Jose, US

Key dates

• Filing date: Dec 24, 2015
• Grant date: Dec 27, 2016
• Expiry date: Dec 24, 2035

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D88/00

Abstract

Peripheral devices for a three-dimensional memory device can be formed over an array of memory stack structures to increase areal efficiency of a semiconductor chip. First contact via structures and first metal lines are formed over an array of memory stack structures and an alternating stack of insulating layers and electrically conductive layers. A semiconductor material layer including a single crystalline semiconductor material or a polycrystalline semiconductor material is formed over first metal lines. After formation of semiconductor devices on or in the semiconductor material layer, metal interconnect structures including second metal lines and additional conductive via structures are formed to electrically connect nodes of the semiconductor devices to respective first metal lines and to memory devices underneath.