Structure and method for compressively strained silicon germanium fins for pFET devices and tensily strained silicon fins for nFET devices
US9548386B1 · kind B1 · utility
7Cited by
5References
13Claims
0Family size
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Key dates
| Filing date | Aug 31, 2015 |
| Grant date | Jan 17, 2017 |
| Priority date | — |
| Expiry date | Aug 31, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a semiconductor structure that includes a tensily strained silicon fin extending upwards from a first portion of a substrate and in an nFET device region, and a SiGe fin structure extending upwards from a second portion of the substrate and in a pFET device region. In accordance with the present application, the SiGe fin structure comprises, from bottom to top, a lower SiGe fin that is relaxed and an upper SiGe fin, wherein the upper SiGe fin is compressively strained and has a germanium content that is greater than a germanium content of the lower SiGe fin.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.