Process method and structure for high voltage MOSFETS
US9755052B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 27, 2013 |
| Grant date | Sep 5, 2017 |
| Priority date | — |
| Expiry date | Aug 27, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/117
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor power device disposed on a semiconductor substrate comprises a plurality of trenches formed at a top portion of the semiconductor substrate extending laterally across the semiconductor substrate along a longitudinal direction each having a nonlinear portion comprising a sidewall perpendicular to a longitudinal direction of the trench and extends vertically downward from a top surface to a trench bottom surface. The semiconductor power device further includes a trench bottom dopant region disposed below the trench bottom surface and a sidewall dopant region disposed along the perpendicular sidewall wherein the sidewall dopant region extends vertically downward along the perpendicular sidewall of the trench to reach the trench bottom dopant region and pick-up the trench bottom dopant region to the top surface of the semiconductor substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.